PLL-Taktpuffer CY2309SXI-1, 1 TSSOP, 16-Pin

Mehr Infos und technische Dokumente
Rechtliche Anforderungen
RoHS Status: kompatibel (Zertifikat anzeigen)

The CY2309 is a low-cost 3.3 V zero delay buffer designed to distribute high speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low skew clocks. The -1H versions of each device operate at up to 100-/133 MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2309 has two banks of four outputs each, which can be controlled by the select inputs. If all output clocks are not required, Bank B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The CY2305 and CY2309 PLLs enter a power-down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25.0 μA current draw for these parts.

Technische Daten
Eigenschaft Wert
Anzahl der Elemente pro Chip 1
Versorgungsstrom max. 35 mA
Eingangsfrequenz max. 133MHz
Montage-Typ SMD
Gehäusegröße TSSOP
Pinanzahl 16
Abmessungen 5.1 x 4.5 x 0.95mm
Länge 5.1mm
Breite 4.5mm
Höhe 0.95mm
Arbeitsspannnung max. 3.6 V
Betriebstemperatur max. +85 °C
Ausgangsfrequenz max. 133.3MHz
Arbeitsspannnung min. 3 V
Betriebstemperatur min. -40 °C
Ausgangsfrequenz min. 10MHz
Voraussichtlich ab 15.04.2020 verfügbar.
Preis pro: Stück (In einer Stange von 48)
(ohne MwSt.)
(inkl. MwSt.)
Pro Stück
Pro Stange*
48 - 48
15,504 €
744,192 €
96 - 240
14,252 €
684,096 €
288 - 480
12,99 €
623,52 €
528 - 960
12,148 €
583,104 €
1008 +
11,14 €
534,72 €
*Bitte VPE beachten
Nicht als Expresslieferung erhältlich.